Concise Logic provides semiconductor designers and manufacturers transistor-level optimization software tools and standard cell libraries that integrate seamlessly within most of today’s commercial synthesis and physical synthesis digital logic design systems.  The “Concise Logic Optimization System” meets or exceeds the following goals on most aggressive digital circuits: 1) reduce power consumption by 20%, 2) reduce total node count by 20%, 3) reduce physical silicon area by 20% and 4) deliver performance equal to or better than the original synthesized circuit.  Savings and improvements of 50% or more can be expected on more typical chips.